Design and VLSI Implementation of Low Voltage and Low Dropout Voltage Regulator

  IJCOT-book-cover
 
International Journal of Computer Trends and Technology (IJCTT)          
 
© - August Issue 2013 by IJCTT Journal
Volume-4 Issue-8                           
Year of Publication : 2013
Authors :Naga Prasad Reddy T, Martin T. J, Chandra Mohan P

MLA

Naga Prasad Reddy T, Martin T. J, Chandra Mohan P "Design and VLSI Implementation of Low Voltage and Low Dropout Voltage Regulator "International Journal of Computer Trends and Technology (IJCTT),V4(8):2667-2676 August Issue 2013 .ISSN 2231-2803.www.ijcttjournal.org. Published by Seventh Sense Research Group.

Abstract:- The usage of the battery power devices in today’s global village has become pervasive and indispensable in almost every walk of life. The thrust is towards reducing the number of battery cells, required to decrease cost and size, while minimizing quiescent current flow to increase battery life. An increasing number of low voltage applications require the use of LDOs, which include the growing family of portable battery products. Regulators are required to reduce the large voltage variations of the battery cells to lower and more acceptable levels. Absence of these power supplies can prove to be catastrophic in most high frequency and high performance circuit designs. As a result the demand for low-voltage, low drop-out regulators are increasing for portable electronics, such as, cellular phones, pagers and laptops. Here the project work deals with complete on-chip voltage regulator with improved transient response. Unlike the conventional LDOs, on-chip capacitance used in this design replaces the need for a large external capacitor allowing greater power system integration for SOC applications. Error amplifier was designed in order to meet high gain and the independent fast path circuit was employed to facilitate the LDO to respond quickly to the sudden load variations. This enabled reduction in the consequent ripple in the output voltage. The fast path was designed to enable easy migration to the other process without much degradation in the performance.

 

References-

[1] Tantawy, R and Brauer, E.J, Performance Evaluation of CMOS Low Drop-Out Voltage Regulators, IEEE Journal of Solid-state Circuits, vol.1, pp 141-144, Jul 2004
[2] G.A. Rincon-Mora and P.E. Allen, A Low-Voltage, Low Quiescent Current, Low Drop-Out Regulator, IEEE J. of Solid-State Circuits, vol.33, pp. 36-44, Jan.1998
[3] Sai Kit Lau, Analysis of low-dropout regulator topologies for low-voltage regulation IEEE Conference Electron Devices and Solid-State Circuits, pp. 379- 382, Dec. 2003
[4] Dongpo Chen, A Low-dropout Regulator with Unconditional Stability and Low Quiescent Current, International Conference on Communications, vol.4, pp. 2215-2218, Jun 2006
[5] Patri Srihari Rao and K.S.R.Krishna Prasad, ON Chip LDO voltage regulator with improved transient response in 180nm, IEEE Transactions on solid-state circuits, Dec 2008
[6] Robert J. Milliken and Jose Silva-Martinez, I, IEEE Conference Electron Devices and Solid-State Circuits, pp. 419- 432, Dec 2007

Keywords : — Low drop out, quiescent current, settling time, Line Regulation and Load Regulation.