Cache Contention on Multicore SystemsAn Ontology-based Approach

International Journal of Computer Trends and Technology (IJCTT)          
© 2019 by IJCTT Journal
Volume-67 Issue-5
Year of Publication : 2019
Authors : Maruthi Rohit Ayyagari


MLA Style:Maruthi Rohit Ayyagari"Cache Contention on Multicore Systems An Ontology-based Approach" International Journal of Computer Trends and Technology 67.5 (2019): 58-62.

APA Style: Maruthi Rohit Ayyagari (2019). Cache Contention on Multicore Systems An Ontology-based Approach International Journal of Computer Trends and Technology, 67(5), 58-62.

Multicore processors have proved to be the right choice for both desktop and server systems because it can support high performance with an acceptable budget expenditure. In this work, we have compared several works in cache contention and found that such works have identified several techniques for cache contention other than cache size including FSB, Memory Controller and prefetching hardware. We found that Distributed Intensity Online (DIO) is a very promising cache contention algorithm since it can achieve up to 2% from the optimal technique. Moreover, we propose a new framework for cache contention based on resource ontologies. In which ontologies instances will be used for communication between diverse processes instead of grasping schedules based on hardware.

[1] V. Transcript, ―Excerpts from a Conversation with Gordon Moore: Moore" s Law,‖ Intel Corp., 2005.
2] D. Bailey, T. Harris, W. Saphir, R. Van Der Wijngaart, A. Woo, and M. Yarrow, ―The NAS parallel benchmarks 2.0,‖ 1995.
[3] D. H. Bailey, ―The NAS Parallel Benchmarks: History and Impact,‖ 2015.
[4] M. Dey, A. Nazari, A. Zajic, and M. Prvulovic, ―EMPROF: Memory Profiling Via EM-Emanation in IoT and Hand-Held Devices,‖ in 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2018, pp. 881–893.
[5] J. L. Henning, ―SPEC CPU2000: Measuring CPU performance in the new millennium,‖ Computer (Long. Beach. Calif)., vol. 33, no. 7, pp. 28–35, 2000.
[6] X. Fu et al., ―New parsec data base of $α$-enhanced stellar evolutionary tracks and isochrones--I. Calibration with 47 Tuc (NGC 104) and the improvement on RGB bump,‖ Mon. Not. R. Astron. Soc., vol. 476, no. 1, pp. 496–511, 2018.
[7] R. West, P. Zaroo, C. A. Waldspurger, and X. Zhang, ―Online cache modeling for commodity multicore processors,‖ ACM SIGOPS Oper. Syst. Rev., vol. 44, no. 4, pp. 19–29, 2010.
[8] G. Liu, J. Park, and D. Marculescu, ―Dynamic thread mapping for high-performance, power-efficient heterogeneous many-core systems,‖ in 2013 IEEE 31st international conference on computer design (ICCD), 2013, pp. 54–61.
[9] M. Qureshi, ―Utility-based cache partitioning: A low-overhead, high-performance, runtime mechanism to partition shared caches,‖ Proc. 39th Annu. IEEE/ACM, 2006.
[10] D. Chandra, F. Guo, and S. Kim, ―Predicting inter-thread cache contention on a chip multi-processor architecture,‖ Comput. Archit., pp. 340–351, 2005.
[11] X. Zhang, S. Dwarkadas, and K. Shen, ―Towards practical page coloring-based multicore cache management,‖ in Proceedings of the 4th ACM European conference on Computer systems, 2009, pp. 89–102.
[12] T. Dey, W. Wang, and J. W. Davidson, ―Characterizing multi-threaded applications based on shared-resource contention,‖ Syst. Softw., pp. 76–86, 2011.
[13] S. Zhuravlev and S. Blagodurov, ―Addressing shared resource contention in multicore processors via scheduling,‖ ACM SIGARCH Comput., vol. 38, no. 1, pp. 129–142, 2010.
[14] M. D. Hill and A. J. Smith, ―Evaluating associativity in CPU caches,‖ Comput. IEEE Trans., vol. 38, no. 12, pp. 1612–1630, 1989.
[15] R. Knauerhase, P. Brett, B. Hohlt, and T. Li, ―Using OS observations to improve performance in multicore systems,‖ Micro, IEEE, pp. 54–66, 2008.
[16] Y. Xie and G. H. Loh, ―Dynamic Classification of Program Memory Behaviors in CMPs,‖ Cmp-Msi’08, no. June, pp. 1–9, 2008.
[17] Y. Jiang, X. Shen, and J. Chen, ―Analysis and approximation of optimal co-scheduling on chip multiprocessors,‖ Proc. 17th, 2008.
[18] Y. Wang, Y. Cui, P. Tao, H. Fan, Y. Chen, and Y. Shi, ―Reducing Shared Cache Contention by Scheduling Order Adjustment on Commodity Multi-cores,‖ 2011 IEEE Int. Symp. Parallel Distrib. Process. Work. Phd Forum, pp. 984–992, May 2011.
[19] S. Kumar and P. K. Singh, ―An overview of modern cache memory and performance analysis of replacement policies,‖ in 2016 IEEE International Conference on Engineering and Technology (ICETECH), 2016, pp. 210–214.
[20] M. Tawarmalani, K. Kannan, and P. De, ―Allocating objects in a network of caches: Centralized and decentralized analyses,‖ Manage. Sci., vol. 55, no. 1, pp. 132–147, 2009.
[21] I. Atoum, A. Otoom, and A. Abu Ali, ―Holistic Cyber Security Implementation Frameworks: A Case Study of Jordan,‖ International Journal of Information, Business and Management, vol. 9, no. 1. Elite Hall Publishing House, Taiwan , Republic of China, pp. 108–118, 2017.
[22] I. Atoum and A. Otoom, ―Mining Software Quality from Software Reviews : Research Trends and Open Issues,‖ International Journal of Computer Trends and Technology (IJCTT), vol. 31, no. 2. Seventh Sense Research GroupTM, pp. 74–83, 2016.
[23] D. Smirnov and P. Stutz, ―Use case driven approach for ontology-based modeling of reconnaissance resources on-board UAVs using OWL,‖ in 2017 IEEE Aerospace Conference, 2017, pp. 1–17.
24] K. Rohloff and J. Loyall, ―An Ontology for Resource Sharing,‖ in Semantic Computing (ICSC), 2011 Fifth IEEE International Conference on, 2011, pp. 530–537.
[25] G. Vandita and G. Sugandha, ―Service Differentiation based on Contention Window with Enhanced Collision Resolution LR-WPANs,‖ Int. J. Comput. Trends Technol., vol. 19, no. 2, pp. 86–90, 2015.
[26] M. R. Ayyagari, ―Integrating Association Rules with Decision Trees in ObjectRelational Databases,‖ Int. J. Comput. Trends Technol., vol. 67, no. 3, pp. 102–108, 2019.
[27] M. R. Ayyagari and I. Atoum, ―CMMI-DEV Implementation Simplified : A Spiral Software Model,‖ Int. J. Adv. Comput. Sci. Appl., vol. 10, no. 4, pp. 445–450, 2019.
[28] M. R. Ayyagari, ―iScrum: Effective Innovation Steering using Scrum Methodology,‖ Int. J. Comput. Appl., vol. 178, no. 10, pp. 8–13, May 2019.
[29] S. Zhuravlev and J. C. Saez, Survey of Scheduling Techniques for Addressing Shared Resources in Multicore Processors, vol. V, no. September. 2011.
[30] M. Mao, Y. Peng, and M. Spring, ―Ontology mapping: as a binary classification problem,‖ Concurr. Comput. Pract. Exp., vol. 23, no. 9, pp. 1010–1025, Dec. 2011.
[31] J. Davies, R. Studer, and P. Warren, Semantic Web Technologies: Trends and Research in Ontology-based Systems, vol. 3, no. 1. John Wiley & Sons, 2006.
[32] J. Lehmann, S. Auer, S. Tramp, and others, ―Class expression learning for ontology engineering,‖ Web Semant. Sci. Serv. Agents World Wide Web, 2011.

component; multicore; cache; contention; FSB; ontology