CBC And Interleaved CBC Implementations Of PACMA Cryptographic Algorithm

  IJCOT-book-cover
 
International Journal of Computer Trends and Technology (IJCTT)          
 
© - October Issue 2013 by IJCTT Journal
Volume-4 Issue-10                           
Year of Publication : 2013
Authors :J. John Raybin Jose , E. George Dharma Prakash Raj

MLA

J. John Raybin Jose , E. George Dharma Prakash Raj "CBC And Interleaved CBC Implementations Of PACMA Cryptographic Algorithm"International Journal of Computer Trends and Technology (IJCTT),V4(10):3724-3733 October Issue 2013 .ISSN 2231-2803.www.ijcttjournal.org. Published by Seventh Sense Research Group.

Abstract:-  PACMA (Parallelized Adaptive Cipher with Modular Arithmetic) is a Symmetric Cryptographic Algorithm designed with traditional techniques to efficiently utilize the parallel processing capabilities of modern computing systems. It overcomes the performance inconsistencies prevalent in conventional cryptographic algorithms when they are implemented in different computing systems with different processing capabilities. The size of the key and the plain text blocks are each 1024-bits. The adaptive nature of this algorithm is achieved by incorporating flexibility in the size of the key and plain text sub-blocks and the number of rounds. Level of Intra-packet parallelization, variety in grain size and the required security strength are achieved by suitably deciding the sub-block size. Flow of the algorithm is made dynamic by determining the execution steps through each key value at runtime. In spite of these advantages the ECB mode implementation of PACMA always produces the same cipher text block for a particular plain text block when the same key is used. CBC and Interleaved CBC modes with 2-way and 4-way interleaving are employed to alleviate this problem. The performance of the PACMA in ECB, CBC and Interleaved CBC modes are analyzed with implementations in shared memory parallel programming environment using OpenMP, Java Threads and MPI.

 

References -

[1] William Stallings, “Cryptography and Network Security-Principles and Practice”, 5th Edition, Dorling Kindersley (India) Pvt. Ltd., licensees of Pearson Education, 2011.
[2] Eric C. Seidel, Joseph N. Gregg, “Preparing Tomorrow?s Cryptography : Parallel Computation via Multiple Processors, Vector Processing, and Multi-Cored Chips”, Research Paper, May 13, 2003.
[3] Jeffrey Hoffstein, Jill Pipher, Joseph H. Silverman, “An Introduction to Mathematical Cryptography”, Springer International Edition, Springer (India) Pvt. Ltd., New Delhi, 2008.
[4] Menezes A. J., Van Oorschot P. C., Vastone S. A., “Handbook of Applied Cryptography”, CRC Press, 1996.
[5] Suman Khakurel, Prabhat Kumar Tiwary, Niwas Maskey, Gitanjali Sachdeva, “Security Vulnerabilities in IEEE 802.11 and Adaptive Encryption Technique for Better Performance”, IEEE Symposium on Industrial Electronics and Applications, Penang, Malaysia, 2010.
[6] Thomas Rauber, Gudula Runger, “Parallel Programming –for Multicore and Cluster Systems”, International Edition, Springer (India) Pvt. Ltd. New Delhi, 2010.
[7] HoWon Kim, YongJe Choi, Kyoil Chung, and HeuiSu Ryu, "Design and Implementation of a Private and Public Key Crypto Processor and Its Application to Security System," proceedings of the 3rd International Workshop on Information Security Applications, pp. 515 – 531, Jeju, Korea, 2002,
[8] Pionteck, T., Staake T., Stiefmeier T., Kabulepa L. D., Glesner M., “Design of reconfigurable AES encryption/decryption engine for mobile terminals”, Paper presented at the proceedings of the International Symposium on Circuits and Systems ISCAS, 2004.
[9] Sourav Mukherjee, Bidhudatta Sahoo, “A survey on hardware implementation of IDEA Cryptosystems” Information Security Journal : A Global Perspective, Vol. 20, Nr. 4-5, pp 210-218, 2011.
[10] Tetsuya Ichikawa, Tomomi Kasuya, and Mitsuru. Matsui. “Hardware evaluation of the AES finalists.” In Proc. Third Advanced Encryption Standard Candidate Conference (AES3), pages 279–285, New York, USA, 2000.
[11] Bryan Weeks, Mark Bean, Tom Rozylowicz, and Chris Ficke. “Hardware performance simulations of Round 2 Advanced Encryption Standard algorithms”. In Proc. Third Advanced Encryption Standard Candidate Conference (AES3), New York, USA, 2000. .

Keywords :— Symmetric Block Cipher, Parallel Adaptive Cryptography, CBC, Interleaved CBC, Modular Arithmetic.